In every processor, there are a myriad of low and high-speed signals/protocols resulting in too many pads, pins, PHYs, wires, and connectors. That translated into too much power and too many signal integrity issues. This architecture will not scale with increasing processor and memory performance.
Keyssa’s VPIO technology aggregates both low-speed and high-speed protocols for simultaneous transmission over one or more links. Multiple protocols are simultaneously scheduled over a Virtual Pipe and can be transmitted/received over a Keyssa contactless connector or a wire.
System Architects and Product Designers are no longer bound by multiple protocols,
physical layers, or mechanical connectors.